proc SCHEMATIC_test_digital_phase_detector {} {
make name_net -name ref -origin {1030 700}
make constant -name xi0 -consval 0 -origin {800 850}
make vco -name xi1 -freq 20e6 -kvco 1 -origin {930 850}
make output -name noiseout -origin {1720 720}
make name_net -name sd_in -origin {930 650}
make name_net -name ph_err -origin {1310 640}
make name_net -name vin -origin {1540 660}
make output -name out -origin {1840 640}
make constant -name xi2 -consval 0 -origin {1480 660}
make digital_phase_detector -name xi4 -delay_resolution 10e-12 -num_levels 64 -ref_freq 20e6 -origin {1170 660}
make vco_with_noise -name xi26 -fc 1.8e9-100e3 -kv 30e6 -foffset 10e6 -noise_at_foffset -146 -origin {1640 680}
make step_in -name xi8 -vend 89.995 -vstart 89.995 -tstep 0 -origin {860 650}
  make_wire 860 850 840 850
  make_wire 1710 720 1720 720
  make_wire 1540 660 1570 660
  make_wire 1310 660 1340 660
  make_wire 1270 650 1310 650
  make_wire 1830 640 1710 640
  make_wire 1830 640 1840 640
  make_wire 1310 690 1340 690
  make_wire 1270 700 1310 700
  make_wire 1040 740 1070 740
  make_wire 1040 900 1830 900
  make_wire 1000 830 1020 830
  make_wire 1020 700 1020 830
  make_wire 1020 700 1030 700
  make_wire 1030 700 1070 700
  make_wire 900 650 930 650
  make_wire 930 650 1070 650
  make_wire 1520 660 1540 660
  make_wire 1040 740 1040 900
  make_wire 1310 690 1310 700
  make_wire 1310 640 1310 650
  make_wire 1310 650 1310 660
  make_wire 1830 640 1830 900
}

