proc SCHEMATIC_test_ds_ord3_1bit {} {
make constant -name xi1 -origin {-410 40}
make constant -name xi2 -origin {-410 -200}
make signal_source -name xi4 -stype 1 -freq 1e3 -origin {-270 -180}
make name_net -name clk -origin {80 -120}
make name_net -name in -origin {80 -200}
make name_net -name clk -origin {470 -120}
make name_net -name clk -origin {800 -120}
make lpf_butter_ord2_w_clk -name xi6 -fp adc_bw_gl -sample_freq clk_freq_gl -origin {630 -170}
make signal_source -name xi3 -freq clk_freq_gl -origin {-270 60}
make name_net -name out_dt -origin {460 -200}
make name_net -name out_dt_filt -origin {1140 -200}
make lpf_butter_ord2_w_clk -name xi0 -fp adc_bw_gl -sample_freq clk_freq_gl -origin {960 -170}
make name_net -name clk -origin {80 230}
make name_net -name in -origin {80 150}
make name_net -name clk -origin {470 230}
make name_net -name clk -origin {800 230}
make name_net -name out_ct -origin {460 150}
make name_net -name out_ct_filt -origin {1140 150}
make lpf_butter_ord2_w_clk -name xi7 -fp adc_bw_gl -sample_freq clk_freq_gl -origin {630 180}
make lpf_butter_ord2_w_clk -name xi8 -fp adc_bw_gl -sample_freq clk_freq_gl -origin {960 180}
make gain -name xi5 -gain 0.1 -origin {-40 -200}
make ds_dt_ord3_1bit -name xiadc_dt -origin {270 -170}
make ds_ct_ord3_1bit -name xiadc_ct -origin {270 180}
  make_wire 460 -200 510 -200
  make_wire 510 -120 470 -120
  make_wire 840 -120 800 -120
  make_wire 750 -200 840 -200
  make_wire 40 -120 80 -120
  make_wire 80 -120 140 -120
  make_wire 80 -200 140 -200
  make_wire 400 -200 460 -200
  make_wire 1080 -200 1140 -200
  make_wire 80 230 140 230
  make_wire 80 150 140 150
  make_wire 460 150 510 150
  make_wire 510 230 470 230
  make_wire 840 230 800 230
  make_wire 750 150 840 150
  make_wire 400 150 460 150
  make_wire 1080 150 1140 150
  make_wire -80 -200 -140 -200
  make_wire 40 40 -140 40
  make_wire 10 -200 80 -200
  make_wire 40 -120 40 40
}

