/////////////////////////////////////////////////////////////
// CppSim Sim File: test.par
// Cell: test_ds_ord2_candy_1bit
// Library: Delta_sigma_examples
/////////////////////////////////////////////////////////////

// Number of simulation time steps
num_sim_steps: 10.17193713173e6

// Time step of simulator (in seconds)
Ts: 1/10e6

output: test trigger=-clk 
probe: out_dt out_dt_filt out_ct out_ct_filt in
       xiadc_ct.x1 xiadc_ct.x2 clk_freq

global_param: 
clk_freq_gl = 1.017193713173e6
adc_bw_gl = 20e3

alter: 
